The TMS9902 is a long time obsolete UART with twin baud rate generators and a timer. This was a interesting project in many ways, mechanical as well as the VHDL design, fitting and VHDL testing. The test bench tool was developed out of the original tool I wrote to produce the VHDL testbenches for this project.

The problem to solve was that the TMS9902 had not only gone obsolete and existing stock was nearing exhaustion, but the masks for the TMS9902 were corrupt and hence no more TMS9902 could be made. Interesting enough, even though the volumes were quite low, only a few thousand, the final part cost including the design costs is only a fraction of the last price paid for a real part. So even had the masks not be corrupt this solution would still be the cheapest by many thousands.

The mechanical design was quite a challenge as the 9902 is an 18 pin DIL part, i.e. long and thin, where as dense cplds are mostly square. Hence the design uses 3 chip-scale BGAs to implement the VHDL for the 9902 functions. But, were the DIL pins to project through the little daughter board even these would be too big, as you can see from the design drawing. So, a specialist supplier was found who produced custom parts (layout and manufacture) for just this sort of application with pins that inserted into blind holes. This left the entire top surface free, room for the parts and the tracking.

As well as the 3 BGAs a 3.3V regulator was also required to reduce the 5V supply and a few decoupling capacitors. On the underneath is a pad, between pins 1 and 18, which a spring probe connects to for programming. This changes the state of some of the pins from normal i/o to jtag pins so that the unit can be programmed and tested after manufacture.